JDK-8370677 : AArch64: C2 SuperWord: implement sequential reduction for add/mul D/F
  • Type: Enhancement
  • Component: hotspot
  • Sub-Component: compiler
  • Affected Version: 26
  • Priority: P4
  • Status: Open
  • Resolution: Unresolved
  • CPU: aarch64
  • Submitted: 2025-10-27
  • Updated: 2025-10-27
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Description
Found during JDK-8340093.

~/Documents/oracle/jdk-fork6/open/src/hotspot/cpu/aarch64/aarch64_vector.ad
Matcher::match_rule_supported_auto_vectorization

This seems to suggest that we don't want to use the implemented NEON reductions, because they use the recusive fold approach, which creates different errors. But of course, we could just implement a linear reduction.

It also seems that there is no SVE support for linear float reductions, for add/mul on D/F.

However: I'm not sure if that is profitable, probably only in edge cases. Still, I wanted to file this report, just so the issue is recorded.