JDK-8354650 : [PPC64] Try to reduce register definitions
  • Type: Enhancement
  • Component: hotspot
  • Sub-Component: compiler
  • Affected Version: 25
  • Priority: P4
  • Status: Resolved
  • Resolution: Fixed
  • CPU: ppc
  • Submitted: 2025-04-15
  • Updated: 2025-06-19
  • Resolved: 2025-06-17
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JDK 26
26 b03Fixed
Related Reports
Relates :  
JDK-8351666 - [PPC64] Make non-volatile VectorRegisters available for C2 register allocation
Description
With JDK-8351666 we get 398 MachRegisterNumbers elements in hotspot/variant-server/gensrc/adfiles/adGlobals_ppc.hpp.
Some of these registers like R0 and R13 as well as VSR0-31 (aliases for F0-F31) are never allocated. We could try to remove these registers from the RegMask.

A simpler solution would be to implement the 32 Vector Registers and remove the 64 Vector Scalar Registers (which are nothing else than 32 Floating Point Registers + 32 Vector Registers).
Conversion functions between VectorRegister and VectorSRegister are already available.
Comments
Remark: We decided to replace the VSR by the VR registers only. That reduced Mach registers from 398 to 270. The remaining ones are not a big deal.
17-06-2025
Changeset: a0820828 Branch: master Author: David Briemann <dbriemann@openjdk.org> Committer: Martin Doerr <mdoerr@openjdk.org> Date: 2025-06-17 10:01:36 +0000 URL: https://git.openjdk.org/jdk/commit/a08208283bcfe395c9962c8de3ba19fdd8cab985
17-06-2025
A pull request was submitted for review. Branch: master URL: https://git.openjdk.org/jdk/pull/25828 Date: 2025-06-16 12:35:47 +0000
17-06-2025