JDK-8232106 : [x86] C2: SIGILL due to usage of SSSE3 instructions on processors which don't support it
  • Type: Bug
  • Component: hotspot
  • Sub-Component: compiler
  • Affected Version: 9,11,13,14
  • Priority: P2
  • Status: Resolved
  • Resolution: Fixed
  • CPU: x86
  • Submitted: 2019-10-10
  • Updated: 2020-06-01
  • Resolved: 2019-10-16
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JDK 11 JDK 13 JDK 14
11.0.8-oracleFixed 13.0.2Fixed 14 b19Fixed
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Description
Instructions like pabsb/w/d, phaddd get emitted when SSE3 is available, but are not supported without SSSE3.
E.g. AMD Opteron(tm) Processor 2218 has SSE3, but not SSSE3.
Test: compiler/c2/cr6340864/TestIntVect.java

Comments
Fix request (11u) -- will label after testing completed. I would like to downport this for parity with 11.0.8-oracle. Applies clean.
09-04-2020

This also affects JDK 11u because Op_AddReductionVI which was added by JDK-8074981 in JDK 9 emits vphaddd as well: http://hg.openjdk.java.net/jdk/jdk/file/a9a78d821f37/src/hotspot/cpu/x86/x86.ad#l3646 See JDK-8241922.
08-04-2020

Fix Request jdk13u Crash was observed in jdk13u. Fix is trivial and applies cleanly.
16-10-2019

URL: https://hg.openjdk.java.net/jdk/jdk/rev/b381e5328461 User: mdoerr Date: 2019-10-16 09:53:25 +0000
16-10-2019

ILW = SIGILL in compiled code due to unsupported instruction, on AMD Opteron(tm) Processor 2218, disable SSE3 = HMM = P2
11-10-2019