JDK-8179954 : AArch64: C1 and C2 volatile accesses are not sequentially consistent
  • Type: Bug
  • Component: hotspot
  • Sub-Component: compiler
  • Affected Version: 8-aarch64,9
  • Priority: P2
  • Status: Closed
  • Resolution: Fixed
  • CPU: aarch64
  • Submitted: 2017-05-09
  • Updated: 2022-11-29
  • Resolved: 2017-05-16
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JDK 10 JDK 8 JDK 9 Other
10Fixed 8u371Fixed 9 b170Fixed openjdk8u292Fixed
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Description
In C2 we use LDAR/STLR to handle volatile accesses, but  in C1 and the interpreter we use separate DMB instructions and relaxed loads. When used together, these do not form a sequentially-consistent memory ordering. For example, if stores use STLR and loads use LDR;DMB a simple Dekker idiom will fail.

This is extremely hard to test because the loads and stores have to be in separately-compiled methods, but it is incorrect, and likely to fail in very weakly-ordered implementations.

Comments
Thanks for your attention. Looks like I should send a mail to aarch64-port mailing list requesting for approval.
31-07-2019

There is no AArch64 port in jdk8u at present.
30-07-2019

Fix Request 8u
26-07-2019

URL: http://hg.openjdk.java.net/jdk9/jdk9/hotspot/rev/38a240fd58a2 User: lana Date: 2017-05-17 18:48:03 +0000
17-05-2017

Seems like this was pushed to JDK 9 without approval. [~aph], please add the request according to [1]. [1] http://openjdk.java.net/projects/jdk9/fix-request-process
16-05-2017

URL: http://hg.openjdk.java.net/jdk9/dev/hotspot/rev/38a240fd58a2 User: aph Date: 2017-05-16 17:31:49 +0000
16-05-2017

Please, add fix request comment and label according to RDP 2 process if you target JDK 9.
16-05-2017

The code is Thread 1 | Thread 2 x = 1 | y = 1 r1 = y | r1 = x The commits to x and y should be ordered, so it's forbidden for both threads to read 0. The problem is that if we use STLR for the store and LDR;DMB for the load we get STLR #1 -> [x] | STLR #1 -> [y] LDR [y] -> r1 | LDR [x] -> r1 DMB | DMB This can happen if the STLR is emitted by C2 and the LDR;DMB by C1. Obviously the trailing DMB can have no effect, so the result is not sequentially consistent. We want to keep using LDAR and STLR in C2, so the right answer is to fix C1 and the interpreter so that we see STLR #1 -> [x] | STLR #1 -> [y] DMB | DMB LDR [y] -> r1 | LDR [x] -> r1 DMB LD | DMB LD
11-05-2017