JDK-8078122 : YMM registers upper 128 bits may get clobbered by a JNI call on windows
  • Type: Bug
  • Component: hotspot
  • Sub-Component: compiler
  • Affected Version: 8u60,9
  • Priority: P2
  • Status: Closed
  • Resolution: Fixed
  • OS: generic
  • CPU: x86
  • Submitted: 2015-04-18
  • Updated: 2017-08-07
  • Resolved: 2016-09-21
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JDK 9
9 b140Fixed
Related Reports
Relates :  
Description
The windows calling convention says that only XMM6-XMM15 are SOE(callee save), whereas upper 128 bits of YMM6-15 are SOC(caller save):
https://msdn.microsoft.com/en-us/library/9z1stfyw.aspx

The x86.ad file does not reflect this and shows the windows native calling convention as SOE for the entire YMM6-15.
The following excerpt from x86.ad file:
#ifdef _WIN64
reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg());
reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1));
reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2));
reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3));
reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4));
reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5));
reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6));
reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7));
...
#endif

If partial register spilling is not supported, one solution would be to declare the entire register as SOC.
Comments
Thanks! I will push it.
21-09-2016

[~kvn] Vladimir, I can't reproduce the failure. It was most likely caused by the XMM kernel bug on the failed machine. I think it's OK for Intel to push it.
21-09-2016

It failed 32-bit. Mac does not have it. Windows has different calling convention. But you are right - changes should affect only 64-bit Windows. I should have run the test on that machine without changes.
21-09-2016

Updated Webrev: http://cr.openjdk.java.net/~vdeshpande/8078122/webrev.02/ Code Contributed by: Kishor Kharbas (kishor.kharbas@intel.com)
02-09-2016

Webrev: http://cr.openjdk.java.net/~vdeshpande/8078122/webrev.00/ Code Contributed by: Kishor Kharbas (kishor.kharbas@intel.com)
24-08-2016

Kishor Kharbas (kishor.kharbas@intel.com) is working on it.
22-08-2016

ILW=YMM calling convention is wrong, no bugs seen yet, none=HLH=P2
22-04-2015