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The logic for x86 C1 to save the SP over MH calls is pretty straight forward which uses the always-callee-saved BP register. On SPARC, and maybe other architectures, we need to choose one of the callee-saved registers and kill it over MH calls. This CR adds some logic to support this. It should be pushed before SPARC C1 support is pushed since that would break x86 C1.
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