A DESCRIPTION OF THE REQUEST :
Insert support for instruction(s) in the bytecode which describe parallelism. For example instructions which specify the next instructions to be performed 2 , 4, 8 , 16 etc times for data in parallel registers. These instructions should be designed so that they can be serialized easily for platforms and JVMs which dont support parallelism.

For example a paralled add would be:

(do 4 times) (add registers 1 and 2 to register 1) which would result in a parallel add of 1 and 2 to 1, 3 and 4 to 3 , 5 and 6 to 5 and 7 and 8 to 7. This could be serialized as four common adds for JITs and JVMs which dont want to implement the actual parallel version.

This parallel prefix could be applied to multiply loads, stores, addition, multiplication, division etc.

JUSTIFICATION :
This would allow compilers to pass knowledge of parallelism to the bytecode level , which would make it easier for JVMs and JITs to implement platform specific optimizations for the common parallel cases without worrying about analysis of parallelism. This would make it possible to compile parallel constructs in java or any other language to SIMDish bytecode, and then get the SIMD advantage on any supporting platform while maintaining ease of implementation and backwards compatibility on other platforms.