JDK-8221220 : AArch64: Add StoreStore membar explicitly for Volatile Writes in TemplateTable
  • Type: Bug
  • Component: hotspot
  • Sub-Component: runtime
  • Affected Version: 8-aarch64,11,13
  • Priority: P4
  • Status: Resolved
  • Resolution: Fixed
  • OS: generic
  • CPU: aarch64
  • Submitted: 2019-03-21
  • Updated: 2021-02-01
  • Resolved: 2019-03-25
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JDK 11 JDK 13 Other
11.0.5Fixed 13 b14Fixed openjdk8u292Fixed
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Description
The original discussion can be found here:
https://mail.openjdk.java.net/pipermail/aarch64-port-dev/2019-February/006875.html

It has been known that Volatile Store needs a StoreLoad|StoreStore barrier at the end of the templateTable_aarch64 functions like fast_storefield, putfield_or_static. In Arm reference manual, according to the description of DMB instruction, the option ISH (Any-Any) for StoreLoad barrier option covers ISHST for StoreStore, so StoreLoad was/is sufficient from the view point of functionality.

In order to make the code self-documented and would not confuse people in future, a suggestion here is to add back the intentionally missed "|StoreStore".

This change will not bring practical impacts to functions since generated instructions are same. 

The positive part of this is: making things clarified and aligned, for example, the logic in interpreter here will be more clearly aligned with the logic in C2 implementation for a volatile write: 
dmb ish
str<x>
dmb ish

Comments
Fix Request (11u) This patch is already in 13 and 8u-aarch64, but not in 11u. Backporting it to 11u keeps codebases in sync, which simplifies future backports. Patch applies cleanly to 11u, passes tier1 (with some unrelated failures).
20-06-2019

Patches pushed, thanks to Felix, Ningsheng, and Andrew. http://hg.openjdk.java.net/jdk/jdk/rev/0db90e99f13b http://hg.openjdk.java.net/aarch64-port/jdk8u-shenandoah/hotspot/rev/06dccf7653c0
26-03-2019

A related patch (years ago): http://hg.openjdk.java.net/aarch64-port/jdk8u/hotspot/rev/ed26923dcc83#l3.118, which created "interpreter memory barriers" initially for aarch64, with reference to corresponding x86 functions.
21-03-2019