JDK-8211061 : Tests fail with assert(VM_Version::supports_sse4_1()) on ThreadRipper CPU
  • Type: Bug
  • Component: hotspot
  • Sub-Component: compiler
  • Affected Version: 11,12
  • Priority: P3
  • Status: Resolved
  • Resolution: Fixed
  • OS: generic
  • CPU: x86
  • Submitted: 2018-09-24
  • Updated: 2019-09-13
  • Resolved: 2018-09-25
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JDK 11
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Some tests fail with:

#  Internal Error (/home/rkennke/src/openjdk/jdk-jdk/src/hotspot/cpu/x86/assembler_x86.cpp:3819), pid=5051, tid=5055
#  Error: assert(VM_Version::supports_sse4_1()) failed

When running hotspot/jtreg:tier1 on my ThreadRipper 1950X box. On Intel box, this works fine. It looks like it attempts to generate fast_sha1 stubs, which use Assembler::pinsrd() but then runs into supports_sse4_1().

I suspect the issue is two-fold:
- It should not generate that stub, using that instructions, on CPU that really do not support the required SSE4.1 instruction set.
- It should detect that TR CPU does, infact, support SSE 4.1

The failing tier1 tests are:
In that case it would be "noreg-sqe": https://openjdk.java.net/guide/changePlanning.html#noreg

> Please add a suitable noreg label. I am actually puzzled what noreg label to add, because there *are* tier1 failures that are fixed by this patch, so regression tests are already there :)

Please add a suitable noreg label.

Fix Request This fix makes three failing tier1 tests (mentioned in synopsis) pass on jdk-updates/jdk11u workspace on TR 2950X. Having clean tier1 tests is an important pre-requisite for sensible maintenance work, let's put this patch in 11u.

The failings all disable SSE(4) and then fail because they try to emit SSE4.1 instructions for SHA intrinsics. The reason why this doesn't fail on my Intel machine is that on that machine, supports_sha() is not supported. Proposed fix: http://mail.openjdk.java.net/pipermail/hotspot-dev/2018-September/034313.html

Yeah, I'll try to fix it. Will attach hs_err as soon as my TR is free again.

Hi Roman, could you please add the hs_err file to the bug report? Do you plan to work on a fix for this? I'm not sure if we have a system with a ThreadRipper CPU available. ILW = Assert due to unsupported instructions being used (probably false positive), systems with AMD ThreadRipper CPU, disable SSE = MMM = P3