C2 compiler has generated incorrect code on PPC64 for the following method:
It starts with the following accesses:
Color oldColor = background; // oop load from field "background"
ComponentPeer peer = this.peer; // volatile load from other field
background = c; // oop store to field "background"
Note that we use support_IRIW_for_not_multiple_copy_atomic_cpu = true on PPC64 which has the effect, that the volatile load is preceded by a MemBarVolatile.
That's why the mach graph looks like this after matching (simplified, only showing memory dependencies):
1: MachProj Memory
2: loadN2P_unscaled(1) // oldColor = background
5: loadN_ac(4) // peer = this.peer
8: storeN(7) // background = c
PhaseCFG::insert_anti_dependences must find an anti-dependence between 8 and 2 in order to schedule the load correctly.
Because insert_anti_dependences does not follow memory edges behind membars, this does not happen and the load gets executed after the store and hence returns the already overwritten value.
The code contains a comment "Wide MemBar's are anti-dependent on everything (except immutable memories).", but a check for this case is missing.
The membar's adr_type is NULL so can_alias returns false and reordering is not prevented.