Implementation of memory ordering on PPC for volatile/unsafe accesses.
This supports ordering of "Independent Reads of Independent Writes"
as tested by VolatileIRIWTest of the torture test suite:
Example: volatile x=0, y=0
_________ __________ __________ __________
| Thread 0 | | Thread 1 | | Thread 2 | | Thread 3 |
write(x=1) read(x) write(y=1) read(y)
Disallowed: x=1, y=0 y=1, x=0
Solution: This example requires multiple-copy-atomicity. This is only
assured by the sync instruction and if it is executed in the thread
doing the load. Thus we implement volatile read as sync-load-acquire
and omit the sync/MemBarVolatile after the volatile store, as
MemBarVolatile happens to be implemented by sync.
This addresses a similar issue as fix "8012144: multiple SIGSEGVs
fails on staxf" for taskqueue.hpp.
Further this change contains a fix that assures that volatile fields
written in constructors are visible before the reference gets
This is preparation for PPC64 integration: http://openjdk.java.net/jeps/175
This and following ppc64 changes will go into staging repository first and tested there: http://hg.openjdk.java.net/ppc-aix-port/stage/