JDK-7142113 : Add Ivy Bridge to the known Intel x86 cpu families
  • Type: Bug
  • Component: hotspot
  • Sub-Component: runtime
  • Affected Version: hs23
  • Priority: P3
  • Status: Closed
  • Resolution: Fixed
  • OS: generic
  • CPU: x86
  • Submitted: 2012-02-02
  • Updated: 2012-03-24
  • Resolved: 2012-03-24
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JDK 7 JDK 8 Other
7u4Fixed 8Fixed hs23Fixed
Currently, Hotspot knows about every Intel core through Sandy Bridge.
The next in line, Ivy Bridge, should be added.
The immediate purpose for this change is to detect which processors support
invariant tsc.

EVALUATION http://hg.openjdk.java.net/lambda/lambda/hotspot/rev/4a24c4f648bd

EVALUATION http://hg.openjdk.java.net/hsx/hotspot-gc/hotspot/rev/4a24c4f648bd

EVALUATION http://hg.openjdk.java.net/hsx/hotspot-comp/hotspot/rev/4a24c4f648bd

EVALUATION http://hg.openjdk.java.net/hsx/hotspot-main/hotspot/rev/4a24c4f648bd

SUGGESTED FIX For the time being, we're limiting the processors for which fast timestamps are enabled to the EP versions of the various cores starting with Nehalem. These are the only ones that support invariant-with-respect-to-clock tsc registers, and are almost always used in either 1 or 2-socket systems. Systems with more than 2 sockets don't attempt to sync tscs among the cores at system init time, which makes using the tsc for timestamps problematic when software threads migrate between cores.

EVALUATION http://hg.openjdk.java.net/hsx/hotspot-rt/hotspot/rev/4a24c4f648bd


SUGGESTED FIX Add code equivalent to the following to vm_version_x86.hpp. int IVBdetector() { int model, family; __asm { mov eax, 1 cpuid // family is in eax[27-20],eax[11-8]; model is in eax[19-16],eax[7-4] mov ebx, eax mov ecx, eax and ecx, 0xf0 and ebx, 0xf0000 shr ecx, 4 shr ebx, 12 add ecx, ebx mov model, ecx mov ebx, eax mov ecx, eax and ecx, 0xf00 and ebx, 0xff00000 shr ecx, 8 shr ebx, 16 add ecx, ebx mov family, ecx } return (family==6) && (model==0x3a); }