JDK-7142113 : Add Ivy Bridge to the known Intel x86 cpu families
Type:Bug
Component:hotspot
Sub-Component:runtime
Affected Version:hs23
Priority:P3
Status:Closed
Resolution:Fixed
OS:generic
CPU:x86
Submitted:2012-02-02
Updated:2012-03-24
Resolved:2012-03-24
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Unresolved : Release in which this issue/RFE will be addressed. Resolved: Release in which this issue/RFE has been resolved. Fixed : Release in which this issue/RFE has been fixed. The release containing this fix may be available for download as an Early Access Release or a General Availability Release.
Currently, Hotspot knows about every Intel core through Sandy Bridge.
The next in line, Ivy Bridge, should be added.
The immediate purpose for this change is to detect which processors support
invariant tsc.
SUGGESTED FIX
For the time being, we're limiting the processors for which fast timestamps
are enabled to the EP versions of the various cores starting with Nehalem.
These are the only ones that support invariant-with-respect-to-clock tsc
registers, and are almost always used in either 1 or 2-socket systems.
Systems with more than 2 sockets don't attempt to sync tscs among the
cores at system init time, which makes using the tsc for timestamps
problematic when software threads migrate between cores.