A separate CPUID bit (defined in about 2007) allows a processor to support 3dnow prefetch instructions without supporting the whole 3dnow instruction set. The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set.
The webrev is at
The logic change is really one small change in src/cpu/x86/vm/vm_version_x86.hpp but to clarify things I changed a function name from supports_3dnow() to supports_3dnow_prefetch() which is really what was meant all along. This was the reason the other files changed. I did not make any change in src/cpu/x86/vm/x86_64.ad since that was not checking for 3dnow support.