JDK-6797305 : Add LoadUB and LoadUI opcode class
  • Type: Enhancement
  • Component: hotspot
  • Sub-Component: compiler
  • Affected Version: hs15,5.0,5.0u4,6,7
  • Priority: P5
  • Status: Resolved
  • Resolution: Fixed
  • OS:
    generic,solaris_9,solaris_10,windows_xp generic,solaris_9,solaris_10,windows_xp
  • CPU: generic,x86,sparc
  • Submitted: 2009-01-23
  • Updated: 2013-11-01
  • Resolved: 2009-03-18
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JDK 6 JDK 7 Other
6u18Fixed 7Fixed hs15Fixed
Related Reports
Duplicate :  
JDK-6216739 - Missed transforming LoadSignedByte&255 into LoadUnsignedByte
Duplicate :  
JDK-6402977 - Optimize use of SPARC signed and unsigned loads
Duplicate :  
JDK-6799997 - Enhance HotSpot for unsigned byte load
Duplicate :  
JDK-6738521 - Speed up access to "unsigned" byte arrays
Duplicate :  
JDK-6345033 - X64: enable load-widen code generation patterns
Description
Add a LoadUB (unsigned byte) and LoadUI (unsigned int) opcode class so we have these load optimizations in the first place and do not need to handle them in the matcher.

These classes will handle code like, e.g.:

bytearray[i] & 0xFF
intarray[i] & 0xFFFFFFFF
Comments
EVALUATION @brackeen: Well the only thing I can think of (for x86) is to use partial register moves (using MOVZX instructions instead of SHR-AND sequences), e.g.: int g = (anInt >> 8) & 0xff; MOV EBX,ECX SHR EBX,#8 AND EBX,#255 vs. MOVZX8 EBX,CH or: int b = anInt & 0xff; MOV EBX,ECX AND EBX,#255 vs. MOVZX8 EBX,CL While the latter one is likely to have the same performance, as the resulting micro instructions should be the same. I will run some tests. Do you have a use-case you can send me?
21-09-2009
EVALUATION http://hg.openjdk.java.net/jdk7/hotspot-comp/hotspot/rev/337400e7a5dd
09-03-2009
PUBLIC COMMENTS All these instructions are used in my changes.
27-02-2009
PUBLIC COMMENTS Please note that SPARC has signed loads (which sign-extend into the 64-bit integer registers) for byte, short, and int. They are: LDSB, LDSH, LDSW. SPARC also has unsigned loads (which zero-extend): LDUB, LDUH, LDUW. Of course, SPARC also has a 64-bit load: LDX.
27-02-2009
EVALUATION Some micro benchmarks show a big performance win.
24-02-2009
PUBLIC COMMENTS I have to revert that. On 32-bit x86 the LoadUI2L opcode helps a lot.
24-02-2009
PUBLIC COMMENTS While implementing LoadUI2L I noticed that it does not make much sense to add that one. On x86_64 there is no such instruction to do that load, because loading an E-register clears the high bits implicitly anyway. And on SPARC all integer loads are unsigned integer loads.
02-02-2009